1. Field of the Invention
The present invention relates to an IC (Integrated Circuit) memory card for storing data such as picture data and character data.
2. Description of the Prior Art
An IC memory card is used with, for example, a digital electronic still camera for the purpose of storing picture data representative of scenes picked up by the camera. While an IC memory card for such an application is often implemented by an SRAM (Static Random Access Memory), recently an EEPROM (Electrically Erasable and Programmable Read Only Memory) is advantageous over an SRAM from a cost standpoint. It is desirable, therefore, that an SRAM and an EEPROM be compatible with each other with respect to the interface in a digital electronic still camera.
Japan Electronics Industry Development Association (JEIDA), for example, has recently proposed an IC Memory Guideline. In the IC Memory Guideline, Third Edition, JEIDA defines a connector having twenty pins. A memory card with an SRAM has eight terminals to input and output data over an 8-bit parallel transfer bus. The eight terminals are used not only to read and write data in the memory chip of the memory card but also to designate the addresses of the memory chip. Therefore, such a memory card has two extra terminals or state terminals for discriminating data and addresses from each other, i.e., the discrimination is made on the basis of the logical states of the state terminals. Specifically, when the address of the memory chip is constituted by a plurality of bytes, the bytes are designated by the combination of the logical states of the two extra terminals.
An IC memory card incorporating an SRAM whose storage capacity is greater than 64 kilobytes, for example, has addresses each being represented by three bytes. It has been customary with this kind of memory card to read the address of the lower byte when both of the two state terminals are in a low level or "L", the address of the medium byte when one of the state terminals is in a low level and the other is in a high level or "H", or the address of the upper byte when their logical states are contrary. Both of the state terminals are in a high level when data is written to the memory card. Further, such an IC memory card needs a read clock terminal for receiving a read timing clock in the event of data read-out and a write clock terminal for receiving a write clock in the event of data write-in.
The memory card with an SRAM has a control circuit therein for controlling the write-in and read-out of data in the memory chip. On receiving an address represented by a plurality of bytes from a host, the control circuit sets up a corresponding address of the memory chip. Thereafter, the control circuit sequentially updates the address of the memory chip in response to a data clock being applied to a clock terminal, thereby reading or writing data in the memory chip. In this manner, in a conventional IC memory card, addresses and data from a host are inputted over a common signal line while a state signal is applied to two state terminals. Clock pulses for reading or writing data in memory chip are also fed from the host to the memory card.
Assuming an IC memory card having a given standardized number of input and output pins such as twenty pins, the memory card cannot be provided with an extra function unless at least one of the pins is omitted. A conventional IC memory card having two state terminals cannot assume more than four different states, inclusive of the data writing state. Hence, when the address has more than three bytes, i.e. , when the storage capacity exceeds 64 kilobytes, it is necessary to increase the number of state terminals for receiving a state signal. Consequently, the inputting and outputting system heretofore practiced cannot meet the demand for extra functions and greater storage capacity.